R-DIMM DDR3 1333
DDR3 1333 ECC/Registered DIMM
Speed: DDR3 1333
Pin Count : 240 pin
Supply Voltage: 1.5V
Thermal Sensor: ODT
Height: 1.18”
ECC-DIMM DDR3 1333
DDR3 1333 ECC DIMM Server
Speed: DDR3 1333
Pin Count : 240 pin
Supply Voltage: 1.5V
Thermal Sensor: ODT
Height: 1.18”
ECC-DIMM DDR3 1066
DDR3 1066 ECC DIMM Server
Speed: DDR3 1066
Pin Count : 240 pin
Supply Voltage: 1.5V
Thermal Sensor: ODT
Height: 1.18”
R-DIMM DDR3 1066
DDR3 1066 ECC/Registered DIMM
Speed: DDR3 1066
Pin Count : 240 pin
Supply Voltage: 1.5V
Thermal Sensor: ODT
Height: 1.18”
FB-DIMM DDR2 800
DDR2 800 Fully Buffered DIMM Memory
Item: Key Attributes
DIMM dimension: 30mm x133.35mm x6.6mm (max non-stack) / 8.2mm (max stack)
Pin count : 240 pin
PCB Layer: 6 Layers/10 Layers(4GB)
Supply Voltages: DRAM & AMB I/O (1.8V) AMB core power (1.5V), Vtt (0.9V), Vdd-spd (3.3V)
Buffer Interface: High-speed Differential Point-to-point Link @ 1.5 Volt
DRAM Interface: SSTL_18
Platform Supported: Intel 5400X (Seaburg) chipsets
FB-DIMM DDR2 667
DDR2 667 Fully Buffered DIMM Memory
Item: Key Attributes
DIMM dimension: 30mm x133.35mm x6.6mm (max non-stack) / 8.2mm (max stack)
Pin count : 240 pin
PCB Layer: 6 Layers
Supply Voltages: DRAM & AMB I/O (1.8V) AMB core power (1.5V), Vtt (0.9V), Vdd-spd (3.3V)
Buffer Interface: High-speed Differential Point-to-point Link @ 1.5 Volt
DRAM Interface: SSTL_18
Platform Supported: Intel 5000X (Greencreek), 5000P/V (Blackford) chipsets.
R-DIMM DDR2 800
DDR2 800 ECC/Registered DIMM
240-pin
JEDEC standard 1.8 ± 0.1V power supply
64Mx8, 128Mx4, 128Mx8, 256Mx4 component configuration
CAS Latency: 5
Off-chip driver (OCD) impedance adjustment on die termination (ODT)
R-DIMM DDR2 667
DDR2 667 ECC/Registered DIMM
240-pin
JEDEC standard 1.8 ± 0.1V power supply
64Mx8, 128Mx4, 128Mx8, 256Mx4 component configuration
CAS Latency: 5
Off-chip driver (OCD) impedance adjustment on die termination (ODT)
R-DIMM DDR2 533
DDR2 533 ECC/Registered DIMM
240-pin
JEDEC standard 1.8 ± 0.1V power supply
64Mx8, 128Mx4, 128Mx8, 256Mx4 component configuration
CAS Latency: 4
Off-chip driver (OCD) impedance adjustment on die termination (ODT)
R-DIMM DDR 400
DDR 400 ECC/Registered DIMM
Power supply: VDD: 2.6V ± 0.1V, VDDQ: 2.6V ± 0.1V
Max clock Freq: 400MHz.
Double-data-rate architecture; two data transfers per clock cycle
Differential clock inputs (CK and /CK)
Burst Mode Operation.
Auto and Self Refresh.
Data I/O transactions on both edge of data strobe.
Edge aligned data output, center aligned data Input.
Serial Presence Detect (SPD) with serial EEPROM
SSTL_2 compatible inputs and outputs.
MRS cycle with address key programs.
CAS Latency (Access from column address): 3
Burst Length (2, 4, 8)
Data Sequence (Sequential & Interleave)
R-DIMM DDR 333
DDR 333 ECC/Registered DIMM
-Power supply: VDD: 2.5V ± 0.1V, VDDQ: 2.5V ± 0.1V
-Max clock Freq: 333MHz.
-Double-data-rate architecture; two data transfers per clock cycle
-Differential clock inputs (CK and /CK) Burst Mode Operation.
-Auto and Self Refresh.
-Data I/O transactions on both edge of data strobe.
-Edge aligned data output, center aligned data Input.
-Serial Presence Detect (SPD) with serial EEPROM
-SSTL_2 compatible inputs and outputs.
-MRS cycle with address key programs.
-CAS Latency (Access from column address): 2.5
-Burst Length (2, 4, 8)
-Data Sequence (Sequential & Interleave)
R-DIMM DDR 266
DDR 266 ECC/Registered DIMM
-Power supply: VDD: 2.5V ± 0.1V, VDDQ: 2.5V ± 0.1V
-Max clock Freq: 266MHz.
-Double-data-rate architecture; two data transfers per clock cycle
-Differential clock inputs (CK and /CK)
-Burst Mode Operation.
-Auto and Self Refresh.
-Data I/O transactions on both edge of data strobe.
-Edge aligned data output, center aligned data Input.
-Serial Presence Detect (SPD) with serial EEPROM
-SSTL_2 compatible inputs and outputs.
-MRS cycle with address key programs.
-CAS Latency (Access from column address): 2.5
-Burst Length (2, 4, 8)
-Data Sequence (Sequential & Interleave)
